Intel Introduces "PISA" Virtual ISA for Greater GPU Software Portability

Intel today updated its Compute Runtime with support for Portable Instruction Set Architecture (PISA) format, a new virtual ISA and programming model for Intel GPUs. Unlike CPUs, where software commonly targets established ISAs such as Arm or x86, GPUs have their own native instruction sets and hardware-specific architectures. As GPU generations introduce new hardware capabilities, execution features, and native instructions, compilers targeting the machine ISA have to account for differences between architectures. A standardized virtual ISA changes this by introducing an abstraction layer between compiler output and the GPU's native machine code. Essentially, PISA provides a common compiler target that allows generalized code to be written once and then finalized for multiple compatible Intel GPU architectures.

With PISA, Intel aims to provide a stable and portable ISA for compilers that target Intel GPUs. This means that a workload compiled to PISA can potentially run across multiple compatible Intel GPU architectures without requiring architecture-specific code generation for each generation. The PISA representation can then be finalized into native machine instructions for the target GPU, allowing the same workload to take advantage of the capabilities of newer hardware where supported, without requiring changes to the original PISA code. This does not mean that every PISA workload will automatically run on every Intel GPU, however, as compatibility depends on the target architecture and the features and instructions used by the program. PISA is also not Intel's first virtual GPU ISA, as the company's existing vISA has long served as an intermediate representation for its GPU compiler stack, while PISA introduces a newer portable ISA and programming model. Read full story